|
週次 |
日期 |
單元主題 |
|
第1週 |
2/23 |
- Syllabus and Slide (Week 1)
- Chapter 1 (1.1 to 1.5) |
|
第4週 |
3/16 |
Chapter 2 - Part I (encrypted)
Chapter 2 - Part II (encrypted) |
|
第5週 |
3/23 |
Chapter 2 (v3) - add BEQ/J architecture
Chapter 4 (v1) - Single-cycle MIPS architecture |
|
第6週 |
3/30 |
Chapter 2 (v3.1) - update p.27
Chapter 4 (v2) - some updates
Passcode is the same |
|
第7週 |
4/06 |
1. Updated Syllabus (with Quiz #1)
2. Chapter 5 slide (part I -cache) |
|
第8週 |
4/13 |
1. Quiz#1 @2pm-2:50pm (cover MIPS assemby, chap.4)
2. Cache Part-I (finalize it today) |
|
第9週 |
4/20 |
* Minor update on Slide v1.1 (Chapter 4-III)
1. 2-4pm: Chapter 4-Part III: Pipelining of MIPS CPU (important!)
Passcode is the same.
2. 4-5pm: Testbench of Verilog (by TA) |
|
第11週 |
5/04 |
Lecture for three hours (start at 2pm)
- cover some untaught parts in Chapter 4.
- cover some important concept in Chapter 3 (slide uploaded - use the same passcode) |
|
第12週 |
5/11 |
Mid-term exam: 2:30pm - 4:30pm
Cover:
1. Verilog code (coding and simulation)
2. CA concept (slides and assigned homeworks)
|
|
第13週 |
5/18 |
Slide v2.pdf is uploaded at 11:40am
Chap.5 - Part-II (Virtual memory)
5/18: Lecture on Virtual Memory (Prof. Wu) + Final project announcement (TA)
By TA (Prof. Wu will be in USA):
5/25: Lecture on VM (TA), Verilog, Tools.
6/1: Check points (each team 12 mins + 3-mins Q&A) -共10組
6/8: Quiz#2 + Multicore concept
6/15: Final project presentation
|
|
第15週 |
6/01 |
6/1: Check points (each team 12 mins + 3-mins Q&A) -共10組 |
|
第16週 |
6/08 |
1. Quiz #2 (2:10 - 2:50) - 40 minutes
2. Lecture on Chap. 6 (Multicore) (3:00-5:20) |
|
第17週 |
6/15 |
Final Project Presentation |